A parametric Verilog implementation for a piecewise-based chaotic system. The digital implementation is very light are requires very small on-ship area, and very useful for digital PRNG and encryption systems.
(Feel free to use/modify these codes as you see fit. Any publications (codes, papers, technical reports,..) in which our codes (in their original or a modified format) have been used should should cite the following references.)
Sample oscilloscope output for an FPGA implementation of the generator.
Copyright (c) 2011, M. Affan Zidan, A. G. Radwan and K. N. Salama
King Abdullah University of Science and Technology
All rights reserved.
Last update: Mar 22, 2012