memristors

On the mathematical modeling of memristors

1 min read ·
Radwan, Ahmed G., et al., "On the mathematical modeling of memristors." In 2010 International Conference on Microelectronics, 2010, 284. Since the fourth fundamental element (Memristor) became a reality by HP labs, and due to its huge potential, its mathematical models became a necessity. In this paper, we provide a simple mathematical model of Memristors characterized by linear dopant drift for sinusoidal input voltage, showing a high matching with the nonlinear SPICE simulations. The frequency response of the Memristor's resistance and its bounding conditions are derived. The fundamentals of

Mohammed Zidan (EE PhD Candidate) received the best postgraduate poster award at the SIECPS conference

1 min read ·
Mohammed Zidan received the best postgraduate poster award at the second Saudi International Electronics, Communications and Photonics conference, held 27-30 April 2013 in Riyadh, KSA.

Prof. Salama's publications recognized by Elsevier's Top 25 hottest articles list

1 min read ·
Ph.D. student, Mohammed Zidan 's paper on Memristor-based memory: The sneak paths problem and solutions are recognized by ScienceDirect as one of the Top 25 hottest papers.

Towards neuromorphic electronics: Memristors on foldable silicon fabric

1 min read ·
MT Ghoneim, et al., "Towards neuromorphic electronics: Memristors on foldable silicon fabric" Microelectronics Journal 45 (11), 2014, 1392. The advantages associated with neuromorphic computation are rich areas of complex research. We address the fabrication challenge of building neuromorphic devices on structurally foldable platform with high integration density. We present a CMOS compatible fabrication process to demonstrate for the first time memristive devices fabricated on bulk monocrystalline silicon (100) which is next transformed into a flexible thin sheet of silicon fabric with all

Memristors Empower Spiking Neurons With Stochasticity

1 min read ·
Maruan Al-Shedivat, et al., "Memristors empower spiking neurons with stochasticity." IEEE journal on Emerging and Selected Topics in Circuits and Systems 5 (2), 2015, 242. Abstract: Recent theoretical studies have shown that probabilistic spiking can be interpreted as learning and inference in cortical microcircuits. This interpretation creates new opportunities for building neuromorphic systems driven by probabilistic learning algorithms. However, such systems must have two crucial features: 1) the neurons should follow a specific behavioral model, and 2) stochastic spiking should be

Pilot assisted readout for passive memristor crossbars

1 min read ·
Rawan Naous, et al., "Pilot assisted readout for passive memristor crossbars." Microelectronics Journal 54, 2016 48. The high demands for performance and energy efficiency pose significant challenges for computational systems. Memristor-based crossbar architectures are actively considered as vital rivals for the traditional solutions. Nonetheless, density and energy driven passive array structures, that lack a switching control per cell, suffer from sneak paths that limit the range of accurate operation of the crossbar array. In this paper, the crossbar array is treated as a communication

Stochasticity Modeling in Memristors

1 min read ·
Rawan Naous, et al., "Stochasticity modeling in memristors." IEEE Transactions on Nanotechnology 15 (1), 2016, 15. Abstract: Diverse models have been proposed over the past years to explain the exhibiting behavior of memristors, the fourth fundamental circuit element. The models varied in complexity ranging from a description of physical mechanisms to a more generalized mathematical modeling. Nonetheless, stochasticity, a widespread observed phenomenon, has been immensely overlooked from the modeling perspective. This inherent variability within the operation of the memristor is a vital

Mani Teja Vijjapu

Mani Teja did his bachelors in Electronics and communications from Jawaharlal Technological University Anantapur, India in the year 2013. He worked as a research associate for Physical Research Laboratory, India for couple of years. He further continued to work as a research associate at IIT Madras, India. Later he pursued his masters in Solid state electronic devices from National Chiao-Tung University (NCTU), Taiwan and graduated in 2018. His Master’s thesis is focused on fabricating a binary synapse like memristor using atomic layer deposition. He did his summer internship at National